Quadrature LC Tank Digitally Controlled Ring Oscillator

ABSTRACT

A quadrature LC tank based digitally controlled ring oscillator (DCO). The oscillator structure incorporates a plurality of stages, each stage including a buffer and a series LC tank. Four stages are coupled together to create a 360 degree phase shift around a loop. The oscillation frequency of the oscillator is the same as the resonant frequency of each LC tank, therefore it avoids quality factor degradation of LC tanks found in the prior art. In one example embodiment, class-D amplifiers are used to drive each of the LC tanks. Capacitor banks before at the input and output of the buffers provide coarse and fine tuning of the frequency of oscillation. The high efficiency exhibited by these amplifiers results in very good phase noise performance of this oscillator. The oscillator utilizes a startup circuit to launch oscillation upon power on.

REFERENCE TO PRIORITY APPLICATION

This application claims priority to U.S. Provisional Application Ser.No. 62/016,399, filed Jun. 24, 2014, entitled “Series LC RingOscillator,” incorporated herein by reference in its entirety.

FIELD OF THE INVENTION

The present invention relates generally to digitally controlledoscillators (DCO) and in particular to a quadrature LC tank baseddigitally controlled ring oscillator.

BACKGROUND OF THE INVENTION

Clock generator circuits are well known circuits that are used in amyriad of applications. In modern integrated wireless/wirelinereceivers, transmitters and transceivers, as well as digital processorsand system-on-chip (SoC) circuits, clock generator circuits are anessential block. In particular, quadrature clock generator circuits areoften used to generate multiple clock signals 90 degrees apart from eachother. To reach a very high data rate in clock and data recoveryintegrated circuits, a multiphase oscillator is typically used. A commonway to generate quadrature clock signals, is to use a conventional ringoscillator. In ring oscillators, oscillation is made based on inverterdelay with capacitive and/or resistive load. A drawback with these typesof oscillators though is that the phase noise is relatively highcompared to LC type of oscillators.

A circuit diagram illustrating an example prior art LC type oscillatorwith quadrature outputs is shown in FIG. 1. The oscillator, generallyreferenced 10, comprises two cross coupled LC oscillators, namelyoscillator A and oscillator B. The first oscillator is coupled in-phaseto the second, but the second one is coupled anti-phase to the first.MOS transistors are used as the coupling devices. This idea can beextended by coupling a higher number of oscillators as shown in FIG. 2.A circuit diagram illustrating an example prior art LC type oscillatorwith an additional number of oscillators is shown in FIG. 2. Thestructure, generally referenced 20, allows an additional number ofdifferent phases to be generated.

In the oscillators of FIGS. 1 and 2, coupling the oscillators forces theoscillation frequency to be shifted away from the resonant frequency ofeach LC tank. Therefore, each tank shows a lower quality factor Q. Inthis way, quadrature accuracy can be traded-off with phase noise. Thehigher the coupling strength the better the in-phase/quadrature (IQ)phase accuracy, but the worse the oscillation phase noise.

A circuit diagram illustrating an example prior art multiphase LC typering oscillator is shown in FIG. 3A. A circuit diagram illustrating anexample implementation of each stage of the oscillator of FIG. 3A inmore detail is shown in FIG. 3B. FIG. 3A shows a multiphase LC ringoscillator, generally referenced 30, that utilizes a parallel LC tankinstead of a resistive/capacitive load as used in prior art conventionalring oscillators. The circuit, generally referenced 40, for each stageof oscillator 30 is shown in FIG. 3B.

Since it has a much higher open loop Q than the conventional ringoscillator, it has substantially better phase noise performance for thesame current consumption. Compared to the oscillator of FIG. 1,cross-coupled pairs are eliminated in the structure of FIG. 3A to avoidpotential parasitic oscillation modes. In this oscillator structure,oscillation frequency is still different than the resonant frequency ofeach LC tank. Therefore, each LC tank shows a lower quality factorresulting in a worse phase noise. In the above three types of prior artoscillators (i.e. FIGS. 1, 2, and 3A), active coupling devices inject acurrent into an LC tank that is not in-phase with the voltage of thetank. Consequently, noise from the coupling device is converted to phasenoise with a higher gain, compared to the case where injected current isin-phase with the voltage of the tank.

A circuit diagram illustrating an example prior art rotarytraveling-wave oscillator (RTWO) is shown in FIG. 4. The structure ofthe RTWO, generally referenced 50, is the rotary ring composed of adifferential transmission line and several active devices to compensatelosses. As a wave starts to propagate around the loop, it travels 360degrees in each rotation cycle. The use of high quality passiveresonators (especially the inductors and transmission lines) results inbetter phase noise performance compared to a conventional ringoscillator. As transistors of the inverters enter the triode region,however, the total quality factor Q of the resonator decreases andconsequently degrades phase noise performance. Note that an alternativeversion of the RTWO can be implemented using lumped components.

A circuit diagram illustrating an example prior art multiphase LC typering oscillator is shown in FIG. 5A. A circuit diagram illustrating anexample implementation of a negative G_(m) cell stage of the oscillatorof FIG. 5A in more detail is shown in FIG. 5B.

In this implementation, the oscillator, generally referenced 60,comprises negative G_(m) elements that are each implemented by a pair ofcurrent biased inverters shown in circuit 70 in FIG. 5B. In this manner,the inverters do not load the quality factor Q of the tank. The resonantfrequency of the oscillator of FIG. 5A is less than the resonantfrequency of a single LC tank, making it less attractive for highfrequency applications.

A circuit diagram illustrating an example prior art multiphase ringoscillator using a CL ladder configuration is shown in FIG. 6. Theoscillator, generally referenced 80, is constructed as a multiphaseoscillator. This oscillator uses a CL ladder rather than an LC ladder byswapping the positions of L and C. It can be shown that in an eightphase oscillator, the CL ladder configuration provides a higher resonantfrequency than a LC ladder. In addition, the oscillation frequency ofthis oscillator is higher than the resonant frequency of a single CLtank. The oscillation frequency, however, cannot go above the resonantfrequency of the inductor and parasitic parallel capacitance of theactive devices.

A circuit diagram illustrating an example prior art LC delay lineoscillator is shown in FIG. 7A. A circuit diagram illustrating anexample implementation of a gain stage of the oscillator of FIG. 7A inmore detail is shown in FIG. 7B. The oscillator structure, generallyreferenced 90, comprises an LC delay line oscillator configuration. Inthis structure, four LC delay lines are used in a loop, with each delayline driven by a gain stage 100 shown in FIG. 7B.

In this circuit, the output load resistance of the gain stage matchesthe characteristic impedance of the delay line. In this oscillator, mostof delay around the oscillator loop is provided by the delay line,making the VCO resistant to variations in power supply, temperature andprocess. The oscillator frequency is the same as the resonant frequencyof the LC delay line. The use of an LC tank improves the phase noise ofthis structure compared to conventional ring oscillators. The use ofresistively loaded gain stages, however, introduces extra loss in theoscillator, making it less power and phase noise efficient.

There is thus a need for an oscillator that overcomes the disadvantagesof the prior art oscillator circuits. Preferably, the oscillator is ableto generate quadrature phase output signals, is simple and accurate,exhibits low phase noise, has a low cost of manufacturing, is powerefficient and consumes relatively little semiconductor real estate.

SUMMARY OF THE INVENTION

The present invention is a quadrature LC tank based digitally controlledring oscillator (DCO). The oscillator structure incorporates a pluralityof stages, each stage including an inverter and a series LC tank. Fourstages are coupled together to create a 360 degree phase shift around aloop. The oscillation frequency of the oscillator is the same as theresonant frequency of each LC tank, therefore it avoids quality factordegradation of LC tanks found in the prior art. In one exampleembodiment, class-D amplifiers are used to drive each of the LC tanks.Capacitor banks at the input and output of the buffers provide coarseand fine tuning of the frequency of oscillation. The high efficiencyexhibited by these amplifiers results in very good phase noiseperformance of this oscillator. The oscillator utilizes a startupcircuit to launch oscillation upon power on.

There is thus provided in accordance with the invention, a ringoscillator comprising a plurality of phase shifters configured in aloop, a plurality of active circuits, each active circuit coupled to andassociated with one of the phase shifters and wherein a gain of theplurality of active circuits combined with voltage amplification of thephase shifters causes the loop to oscillate.

There is also provided in accordance with the invention, a ringoscillator comprising a plurality of LC-tank based phase shiftersconfigured in a loop, a plurality of amplifiers, each amplifier coupledto and associated with one of the phase shifters, wherein the gain ofthe plurality of amplifiers combined with voltage amplification of thephase shifters is sufficient to maintain oscillation in the loop and astartup circuit operative to inject one or more pulses into the loop tolaunch the oscillation.

There is further provided in accordance with the invention, a quadraturering oscillator comprising a plurality of four 90 degree phase shiftersconfigured in a loop, a plurality of four active circuits, each activecircuit coupled in series with one of the phase shifters, a plurality oftuning capacitors, each tuning capacitor coupled to and associated withone of the active circuits, wherein a gain of the plurality of activecircuits combined with voltage amplification of the phase shifters issufficient to maintain oscillation in the loop and a startup circuitoperative to inject one or more pulses into the loop to launch theoscillation.

BRIEF DESCRIPTION OF THE DRAWINGS

The invention is herein described, by way of example only, withreference to the accompanying drawings, wherein:

FIG. 1 is a circuit diagram illustrating an example prior art LC typeoscillator with quadrature outputs;

FIG. 2 is a circuit diagram illustrating an example prior art LC typeoscillator with an additional number of oscillators;

FIG. 3A is a circuit diagram illustrating an example prior artmultiphase LC type ring oscillator;

FIG. 3B is a circuit diagram illustrating an example implementation ofeach stage of the oscillator of FIG. 3A in more detail;

FIG. 4 is a circuit diagram illustrating an example prior art rotarytraveling-wave oscillator;

FIG. 5A is a circuit diagram illustrating an example prior artmultiphase LC type ring oscillator;

FIG. 5B is a circuit diagram illustrating an example implementation of anegative G_(m) cell stage of the oscillator of FIG. 5A in more detail;

FIG. 6 is a circuit diagram illustrating an example prior art multiphasering oscillator using a CL ladder configuration;

FIG. 7A is a circuit diagram illustrating an example prior art LC delayline oscillator;

FIG. 7B is a circuit diagram illustrating an example implementation of again stage of the oscillator of FIG. 7A in more detail;

FIG. 8A is a circuit diagram illustrating an example series LC tank usedas 90 degree phase shifter;

FIG. 8B is a circuit diagram illustrating an example implementation ofthe driving buffer in the circuit of FIG. 8A in more detail;

FIG. 8C is a graph illustrating magnitude response versus frequency forthe circuit of FIG. 8A;

FIG. 8D is a graph illustrating phase response versus frequency for thecircuit of FIG. 8A;

FIG. 9A is a circuit diagram illustrating an example embodiment of theclass-D series LC tank ring oscillator with a starting circuitconstructed in accordance with the present invention;

FIG. 9B is a diagram illustrating example waveforms of the circuit ofFIG. 9A;

FIG. 9C is a graph illustrating voltage versus time for the circuit ofFIG. 9A;

FIG. 9D is a graph illustrating current versus time for the circuit ofFIG. 9A;

FIG. 10 is a circuit diagram illustrating a second embodiment of thering oscillator of the present invention;

FIG. 11 is a circuit diagram illustrating a third embodiment of the ringoscillator of the present invention;

FIG. 12A is a circuit diagram illustrating one of the stages of the ringoscillator in more detail;

FIG. 12B is a graph illustrating output versus input amplitude of one ofthe stages of the ring oscillator;

FIG. 13 is a circuit diagram illustrating a fourth embodiment of thering oscillator of the present invention having mutual coupling betweeninductors;

FIG. 14 is a circuit diagram illustrating a fifth embodiment of the ringoscillator of the present invention having a differential configurationwith tail current sources;

FIG. 15 is a circuit diagram illustrating a sixth embodiment of the ringoscillator of the present invention incorporating capacitive voltagedividers;

FIG. 16 is a circuit diagram illustrating an example feedback system ofthe ring oscillator of the present invention;

FIG. 17A is a circuit diagram illustrating a seventh embodiment of thering oscillator of the present invention incorporating a startup circuitthat injects a short pulse to the oscillator loop;

FIG. 17B is a diagram illustrating example waveforms of the circuit ofFIG. 17A;

FIG. 18A is a circuit diagram illustrating an eighth embodiment of thering oscillator of the present invention incorporating a startup circuitthat includes an auxiliary oscillator;

FIG. 18B is a diagram illustrating example waveforms of the circuit ofFIG. 18A; and

FIG. 19 is a circuit diagram illustrating a ninth embodiment of the ringoscillator of the present invention incorporating a startup circuit thatincludes back to back inverter pairs.

DETAILED DESCRIPTION OF THE INVENTION

The present invention is a quadrature LC tank based digitally controlledring oscillator. Note that, alternatively, one skilled in the art canimplement analog tuning for use in analog PLLs. The oscillator structureincorporates a plurality of LC tanks, such as four, to create a 360degree phase shift around a loop. The oscillation frequency of theoscillator is the same as the resonant frequency of each LC tank,therefore it avoids quality factor degradation of LC tanks found in theprior art. In one example embodiment, class-D amplifiers are used todrive each of the LC tanks. The high efficiency exhibited by theseamplifiers results in very good phase noise performance of thisoscillator. The oscillator utilizes a startup circuit to launchoscillation upon power on.

The phase noise exhibited by an oscillator is among the most importantcriterion of an oscillator. In addition to phase noise (PN), importantperformance criteria include the active area, fine tuning steps and highphase accuracy which are also critical in many applications. Whileminimizing PN, the focus is also typically on cost and area. Mostcommunication systems require high accuracy quadrature clocks. Ultrafinetuning steps are also required to reach a high modulation accuracy andlow quantization noise in a digitally controlled oscillator that is partof a digital PLL.

In one embodiment, the present invention is a quadrature series LC tankring oscillator (RO) that uses high-efficiency class-D amplifiers. Afirst DCO constructed in accordance with the present invention usesultra-small low-Q inductors to achieve a very low semiconductor areawhile maintaining high purity referred to as the “LA” version. A secondDCO constructed in accordance with the present invention uses largerinductors to achieve very low phase noise while featuring very high I/Qaccuracy and ultra-fine tuning steps referred to as a high-performanceor “HP” version.

A circuit diagram illustrating an example series LC tank used as 90degree phase shifter is shown in FIG. 8A. A circuit diagram illustratingan example implementation, generally referenced 116, of the drivinginverter on the circuit of FIG. 8A in more detail is shown in FIG. 8B. Agraph illustrating magnitude response versus frequency for the circuitof FIG. 8A is shown in FIG. 8C. A graph illustrating phase responseversus frequency for the circuit of FIG. 8A is shown in FIG. 8D.

With reference to FIG. 8A, a series LC tank, generally referenced 110,is driven by a low impedance source. A Bode plot 112 in FIGS. 8C and 8Dshows the output voltage of this LC tank circuit amplified Q times andphase shifted by −90 degrees (see plot 114) at the resonant frequency ofthe LC tank. To work properly, the tank is preferably driven with a lowimpedance source. A simple CMOS inverter 118 as a class-D amplifierprovides such a low impedance as long as a sufficiently large enoughinput signal is provided as shown in FIG. 8B. While the input of theinverter is a sinusoidal signal, its output jumps rapidly between 0V andV_(DD) yielding a square wave. The LC tank filters higher harmonics andgenerates a sinusoidal with total phase shift of +90 degrees withrespect to the inverter's input. Putting a plurality of these stages ina loop, e.g., four, a 360 degree phase shift is generated withsufficient gain to satisfy the Barkhausen criterion of oscillation.

In one embodiment, the architecture of the oscillator is based on a 90degree phase shifter. Using a multiple, e.g., four, of these phaseshifters in a loop with the required amplification gain, Barkhausenphase and gain criteria can be satisfied and a quadrature oscillator isformed. The simplest 90 degree phase shifter is a series LC tank. Plots112 and 114 of FIGS. 8C and 8D, respectively, show the frequencyresponse of this network.

This second-order low-pass filter produces an exact 90 degree phaseshift at resonance frequency. Moreover, it has a voltage gain equal tothe quality factor (Q) of the tank. To maintain the quality factor ofthe tank, it is preferably driven with a low impedance voltage source.Also, its output load is preferably a high impedance or capacitive loadto be absorbed as part of the tank capacitance.

A circuit diagram illustrating an example embodiment of the class-Dseries LC tank ring oscillator with a starting circuit constructed inaccordance with the present invention is shown in FIG. 9A. A diagramillustrating example waveforms of the circuit of FIG. 9A is shown inFIG. 9B. A graph illustrating voltage versus time for the circuit ofFIG. 9A is shown in FIG. 9C. A graph illustrating current versus timefor the circuit of FIG. 9A is shown in FIG. 9D.

The core of the oscillator, generally referenced 120, is shown in FIG.9A. If there is an oscillation in the loop, the core maintains it andcreates 0, 90, 180, and 270 degree phases. If the oscillator starts fromzero, however, positive DC gain around the loop forces the outputs ofthe inverters to 0 and V_(DD) (e.g., V_(d1)=V_(d3)=0 andV_(d2)=V_(d4)=V_(DD)). In this state, the oscillator is locked and thegain of the inverters is around zero. Therefore, unlike in conventionaloscillators, noise does not initiate the oscillation build-up. Thepresent invention incorporates a starter circuit operative to generatethe initial oscillation in the core. In one embodiment, the startercircuit includes an auxiliary oscillator 124 at a frequency roughly nearresonant frequency of the core as well as a T-gate circuit 122 thatconnects it to the core. At first, the auxiliary oscillator 124 isturned on and connected to the core. After few nanoseconds whenoscillation is established in the main core, the auxiliary oscillator isturned off and disconnected. Adding back-to-back inverters 126 betweenthe differential outputs (i.e. V_(d1,3)/V_(d2,4)) assists easier startupof the core.

FIG. 9B shows transient waveforms of the oscillator including V_(ctrl)150, Aux Osc 152 and V₁ 154. If the inverters 121 are sized properly,the voltage waveform of their outputs comprises a square wave. Then,each of the transistors conducts when only its drain-source voltage isabout zero. In this way the inverters are operated as high-efficiencyclass-D amplifiers without noticeable degradation of the tank Q-factor.

In one embodiment, the oscillator 120 comprises four series LC tanks 123and four inverters 121 in a loop. The four LC tanks provideapproximately 360 degree phase shift around the loop, with 90 degreesgenerated by each tank. The required loop gain for oscillation isprovided by voltage amplification of the series LC tank in combinationwith gain of the inverters. The four inverters ensure proper driving ofthe LC tanks with a low impedance as well as isolating them. In general,active circuits or buffers are used in place of inverters. Furthermore,the capacitive input impedance of the inverter is absorbed by thecapacitor of the LC tank. One skilled in the art, however, can implementthe buffers in other ways besides inverters to achieve the oscillator ofthe present invention.

FIGS. 9C and 9D show simulated voltage and current waveforms of theoscillator with V_(DD)=0.6V and Q=3, at 1 GHz. Note that it is assumedthat the oscillator 120 has proper initial conditions and a stableoscillation. In this state, the inverters have a full swing square waveoutput (V_(d1)-V_(d4)) between 0 and V_(DD). The first LC tank filtershigher harmonics of its square wave input (V_(d1)) 162 resulting in asine wave output on V₁ 158. Since the circuit oscillates at resonancefrequency of the tanks, V₁ has a −90° phase shift relative to V_(d1).Furthermore, the amplitude of V₁ is Q times larger than the firstharmonic of V_(d1). Next, V₁ drives the subsequent buffer in the chainwhich converts its sine wave input into an inverted square wave (V_(d2))160 which results in a sine wave output on V₂ 156. This sequencecontinues in the loop for the subsequent stages.

By having a large enough voltage swing at the input of each inverter andappropriate transistors sizes, the outputs of the inverters are squarewaves switching rapidly between 0 and V_(DD). In this manner, while eachof the NMOS or PMOS transistor is on, its drain to source voltage dropis nearly zero. Therefore, the inverters are operating as very highefficiency class-D amplifiers with very low power loss. Consequently,most of oscillator input power is injected into the LC tanks yieldinglarge oscillation amplitude and low phase noise.

Considering (expediently) buffers as ideal amplifiers with asmall-signal negative gain A, the transfer function of the open loop canbe written as follows:

$\begin{matrix}{{H({j\omega})} = \left( \frac{- A}{1 + {j{RC}\omega} - {{LC}\omega}^{2}} \right)^{4}} & (1)\end{matrix}$

in which R, L and C are series loss resistance, inductance andcapacitance of the tank, respectively. Consequently, the oscillationfrequency can be calculated as:

$\begin{matrix}{\omega_{osc} = \frac{1}{\sqrt{LC}}} & (2)\end{matrix}$

which is the same resonance frequency of each individual tank.

A circuit diagram illustrating a second embodiment of the ringoscillator of the present invention is shown in FIG. 10. The oscillator,generally referenced 170, comprises a plurality of stages, e.g., four,with each stage comprising a buffer 191 coupled to an LC tank 193. Inthis example, the buffer comprises an inverter and the LC tank comprisesL₁₋₄ 172 and C₁₋₄. Note that capacitors C_(g1-4) and the parasitics ofsubsequent inverters can be also considered as part of C₁₋₄. Theoscillator also comprises starter circuitry 178 and an I/O interface 176for configuring the capacitor selection which controls the coarse andfine tuning of the frequency of oscillation. The startup circuitrycomprises an auxiliary oscillator 180, T-gate 182 and dummy T-gates 184.

In one embodiment, the oscillator 170 utilizes four relatively smallinductors to save area. Consequently, the inductors have a very lowquality factor of about 1.5 to 2. In another embodiment, the oscillatoruses four regular size inductors with Q=8. Since the series LC tank atresonance has a voltage amplification gain of Q for the first harmonic,its voltage swing can break down the gate oxide of inverters. Therefore,capacitor 174 is placed before each inverter to make a capacitivevoltage divider in combination with parasitic capacitance of theinverter. Then, by choosing an appropriate capacitor value, the voltageswing at the input of the inverter is reduced to a value ensuringreliability of the transistors. In this embodiment, the gate of thetransistors is biased through R₁₋₄ to V_(bias) which comes from a dummyself-biased inverter. In addition to the starter circuit, three dummyswitches are placed at the output of the other inverters to keep thefour phases balanced.

It is noted that the quadrature oscillator structure can reach arelatively high I/Q accuracy, as the 90 degree phase shifts areinherently generated around the loop. In contrast, prior art QVCOs madeby cross coupling two oscillator cores trades off quadrature accuracywith PN. Due to the single ended implementation of the oscillator of thepresent invention, no layout asymmetry is created that would otherwisedegrade I/Q accuracy. To measure the oscillator quadrature accuracy,four quadrature baseband signals are upconverted by the oscillatorquadrature signals around the carrier. Image rejection ratio (IMRR) ofthe upconverted signal reflects the quadrature accuracy of theoscillator. The image rejection ratio (IMRR) is measured for thehigh-performance (HP) version of the oscillator across the tuning range.In one example, IMRR ranges from 45 to 60 dB for the HP version and from35 to 47 dB for the LA version, considering worst case out of 5 ICsamples each.

Note that the preferred way to tune the frequency of oscillation is bychanging the capacitances in series with the inductors. In the LAversion, C₁₋₄ (FIG. 11) is tunable by 5 bits of 12 fF steps, covering anoctave (66%) tuning range from 2.82 to 5.61 GHz. In the HP version,coarse tuning banks C₁₋₄ (FIG. 10) are tunable by 4 bits of 20 fF steps.This covers a tuning of 26% from 1.85 to 2.4 GHz. In addition to thesebanks, four fine tuning banks are added (C_(g1-g4) in FIG. 10). Each ofthese capacitor banks are 7 bits with an ultralow step size of 100 aF.This gives a frequency resolution of 20 kHz in 500 steps (≈4×2⁷ levels),when fine tuning banks are controlled separately.

To achieve further ultrafine tuning steps, capacitor banks C_(d1-d4)(FIG. 10) can be placed at the inverter outputs. Any capacitance at theoutput of each inverter introduces a small delay inversely proportionalto the large-signal G_(m) of the inverter. As the inverters are verystrong to be able to drive the LC tanks, the capacitance effect at theoutput of inverters in much smaller than its effect when it isparalleled with C₁₋₄. Placing the same fine tuning banks at the outputof inverters (C_(d1-d4) in FIG. 10) improves the frequency resolutiondown to 1.27 kHz, i.e. a 16× reduction in this example implementation.

Thus, the tank capacitor bank C₁₋₄ provides relatively coarse frequencytuning of the oscillator. Capacitor bank C_(g1-4) connected to the inputof the buffers provides somewhat finer tuning resolution. CapacitorsC_(d1-4) connected to the output of the buffers, however, provideextremely fine tuning, e.g., 1.27 kHz. This capacitor bank at the drainsof the buffers, however, has much less effect than the capacitor bankconnected to the gate of the buffers and is able to achieve much finerresolution.

Differential nonlinearity (DNL) and integral nonlinearity (INL) of theoscillator ranges from −0.9/+0.95 and −0.86/+1 LSB, respectively.Considering the achieved DNL/INL, the frequency resolution of 1.27 kHzis extremely high. The PN and figure of merit (FoM) of the highperformance oscillator versus supply voltage are also relatively good.The oscillator shows an FoM of 186.5 to 187 dB across its tuning rangewhen V_(DD) is 0.8V. As V_(DD) goes down, voltage amplitude at theinputs of the inverters are reduced and thus output impedance of theinverters are increased. This gradually degrades the tank quality factorand results in a lower FoM. Flicker noise of this oscillator ranges from200 kHz to 300 kHz. The low area (LA) version oscillator, exhibits anFoM of 167.5 to 176.7 dB across its tuning range. When the oscillator isrunning at 5.6 GHz, the inductors have a slightly higher Q. V_(DD) isreduced from a typical 1.1V to 0.85V. Note that in both LA and HPimplementations of the oscillator, the four inductors L₁₋₄ are placed ina substantially symmetric manner. Since the currents of each twosucceeding inductors have a 90 degree phase shift, the total magneticfield rapidly becomes zero as we move away from the oscillator core.This effect specifically reduces magnetic coupling of this structurewith other blocks in the same die.

A circuit diagram illustrating a third embodiment of the ring oscillatorof the present invention is shown in FIG. 11. The oscillator, generallyreferenced 181, comprises a plurality of stages, e.g., four, with eachstage comprising a buffer 195 coupled to an LC tank 197. In thisexample, the buffer comprises an inverter and the LC tank comprises L₁₋₄183 and C₁₋₄. The oscillator also comprises starter circuitry 187 and anI/O interface 185 for configuring the capacitor selection which controlsthe coarse and fine tuning of the frequency of oscillation. The startupcircuitry comprises an auxiliary oscillator 171, T-gate 189 and dummyT-gates 173. The oscillator also comprises back to back inverter gates199 similar to the back to back inverters 126 of FIG. 9A. The inverters199 are coupled to the nodes V_(d1-d4) and are operative to assist instartup, for example in the low area (LA) version of the oscillator. Theoperation of the oscillator 181 is similar to that of oscillator 170 ofFIG. 10 and will not be repeated here.

A circuit diagram illustrating one of the stages of the ring oscillatorin more detail is shown in FIG. 12A. A graph illustrating output versusinput amplitude of one of the stages, generally referenced 190, of thering oscillator for V_(DD)=0.6V and Q=3, at 1 GHz is shown in FIG. 12B.To satisfy the loop gain criteria, each of four stages preferably has again of 1 in the steady state. Since the quality factor of the tank isusually more than unity, the absolute large signal gain of the buffersare less than unity. In fact, they act as limiters switching between 0and V_(DD) in steady state operation. Hence, these transistors should belarge enough to switch the tanks completely.

FIG. 12B shows the output oscillation amplitude 194 of one of the stagesversus the input sine wave amplitude 196. The input bias voltage of thisstage is tuned to be the same as the output voltage. As the inputamplitude increases, amplitude of V_(d) 198 increases as well. Since theinput frequency is the same as the resonant frequency of the LC tank,V_(out) is Q times larger than the first harmonic of V_(d). For largeinput amplitudes, V_(d) is saturated between 0 and V_(DD). Therefore,the large signal gain from V_(in) to V_(d) is less than one. If the LCtank has a high enough quality factor, large signal gain from V_(in) toV_(out) can be higher than one. Then, the oscillator loop can have astable oscillation. The point where the amplitude of V_(out) and theinput amplitude are equal with a curve slope of less than unity is thestable output oscillation amplitude (≈1.02V in this plot, see traces 194and 196).

A circuit diagram illustrating a fourth embodiment of the ringoscillator of the present invention having mutual coupling betweeninductors is shown in FIG. 13. In this circuit, generally referenced200, L₁ and L₃ as well as L₂ and L₄ are magnetically coupled to act astransformers. Relatively low Q inductors are used where each coupled Lis 180 degrees out of phase. Otherwise, the operation of the circuit issimilar to that of the oscillator of FIGS. 10 and 11.

A circuit diagram illustrating a fifth embodiment of the ring oscillatorof the present invention having a differential configuration with tailcurrent sources is shown in FIG. 14. The circuit, generally referenced210, represents a differential embodiment with tail current sources(i.e. M₅ and M₆). To maintain class-D operation of the amplifiers,relatively large capacitors (i.e. C₅ and C₆) are connected in parallelwith the current sources to make tail nodes AC ground. Using the currentsources, the oscillation amplitude as well as current consumption of theoscillator can be controlled.

A circuit diagram illustrating a sixth embodiment of the ring oscillatorof the present invention incorporating capacitive voltage dividers isshown in FIG. 15. In this circuit, generally referenced 220, capacitivevoltage dividers 222 are used before each transistor stage. When a highquality factor LC tank is used, the voltage swing at the output of eachLC can be several times higher than V_(DD), damaging the transistors.Using the voltage dividers, this voltage is scaled down to an acceptablerange for the transistors. The voltage dividers comprise capacitorsCs₁₋₄ and C_(p1-4). Bias resistors R₁-R₄ are required to provide the DCbias voltage for the transistors. Note that the operation of thisembodiment is similar to that of the oscillator 170 of FIG. 10.

In one embodiment, the transistors of the oscillator stages arepreferably sized large enough to have a small output resistance. Eventhough we may find specific amplitude in which the loop has a largesignal gain of more than one, this oscillator does not inherently tendto oscillate at startup. The reason for this is explained as follows.First consider a conventional three stage inverter based ringoscillator. In this case, the loop has a negative feedback at DCfrequency. This means that all outputs remain in a metastable DC pointbefore oscillation startup. Intrinsic noise of this three stageoscillator may find a loop gain of more than unity with zero degreephase shift at a certain frequency which causes the oscillation to buildup. The noise can cause startup only in oscillators in which bothamplitude and phase criteria are satisfied in small signal around the DCbias point of the circuit.

In the case of one embodiment of the oscillator of the presentinvention, there are four inverting stages in contrast to the previouscase with three inverters. Thus, there is a positive feedback loop at DCfrequency (i.e. with shorted inductors and open capacitors at thisfrequency) which forces the outputs of two stages to stay high and theoutputs of the other two stages to stay low. Considering the exampleoscillator 120 of FIG. 9A, V_(d1) and V_(d3) might remain at V_(DD) andV_(d2) and V_(d4) to ground, or vice versa. Therefore, the drain currentof all the transistors will be zero disregarding leakage currents. Inthis lock state, although the noise may find phase shift criterion at acertain frequency, the small signal gain is quite low. Thus, the noiseis not capable of gaining enough amplification to increase and makeoscillation around the loop at startup. Although the lock state does notoccur when the capacitor divider is present, e.g., in FIG. 10, eachstage might not have sufficient signal gain for startup. As shown inFIG. 12B, the gain of each stage could be less than unity for smallsignals, while it could increase to more than unity for a large inputsignal (see traces 194 and 196).

A circuit diagram illustrating an example feedback system of the ringoscillator of the present invention is shown in FIG. 16. In this Figure,the oscillator is shown as a feedback system, generally referenced 230.As described supra, a small input signal (V_(i)) e.g., noise, cannotremove the oscillator lock state at startup. Hence, a large disturbanceon V_(i) is needed to pull the oscillator out of the lock state.Consider a high swing sinusoidal signal on V_(i). This signal can switchthe first buffer in the loop on and off. Consequently, the output of thefirst stage can switch subsequent stages respectively. Finally, theoutput signal (V_(o)) is fed back to the input and causes furtherswitching in the loop. At this time, the lock state is broken down andV_(i) can be removed. If the propagated disturbance signal in the loopcan find enough gain, it builds up and the oscillation stabilizes.

A circuit diagram illustrating a seventh embodiment of the ringoscillator of the present invention incorporating a startup circuit thatinjects a short pulse to the oscillator loop is shown in FIG. 17A. Adiagram illustrating example waveforms of the circuit of FIG. 17A isshown in FIG. 17B. In this circuit, generally referenced 240, a shortinput pulse can be injected to the loop to launch oscillation. The shapeof the input pulse is optimized to find the input signal which createsthe largest output amplitude on V_(o) at the end of the first cycle. Forexample, a one cycle sine wave signal with a period equal to the periodof the oscillator can produce a higher amplitude than the same inputwith a (much) shorter period. The input disturbance signal with optimumshaping may not be practical to implement. A practical implementablesignal shape is a single square pulse 242 which when injected into theloop results in V₁ 244 shown in FIG. 17B.

First, consider lock state 1 in which M_(1p), M_(2n), M_(3p), and M_(4n)are on and the other transistors are off. In lock state 2, M_(1n),M_(2p), M_(3n), and M_(4p) are on and the other transistors are off.Connecting V₁ to ground by M_(sw1) causes two events to happen: (1) theinput disturbance signal changes the state of V_(d2) and consequently asinusoidal wave propagates through the loop; and (2) L₁ is chargedthrough M_(sw1) and M_(1p) while V₄ is maintains its initial state. Byreleasing M_(sw1) the energy stored in L₁ is released and creates a newsine wave that propagates into the loop. To generate the largestinjected wave in the loop (i.e. sinusoidal wave on V₁) which ensuresmore reliable startup, the two previously discussed waves should be inphase at V₁. This means that the first falling edge of V_(d1) coincideswith the first peak of V₁ caused by releasing M_(sw1). This can beachieved by the proper adjustment of t_(p). The optimum value of t_(p)is between ¼ to ½ of the oscillation period, which can be determinedfrom simulation, for example. For lock state 2, another switch (i.e.M_(sw2)) on V₂ is needed to inject the disturbance signal into the loopwith the same procedure. Note that for the sake of simplicity wedisregard lock state 2.

A circuit diagram illustrating an eighth embodiment of the ringoscillator of the present invention incorporating a startup circuit thatincludes an auxiliary oscillator is shown in FIG. 18A. A diagramillustrating example waveforms of the circuit of FIG. 18A is shown inFIG. 18B. In another circuit, generally referenced 250, an auxiliaryoscillator 254 comprising inverters 262 is connected to one of the nodesin the feedback loop of the main oscillator for a short period of time,using a T-gate switch 252 comprising transistors 256, 258 and invertergate 260 controlled by V_(ctrl). If the auxiliary oscillator hassufficient driving strength, as well as an oscillation frequency almostthe same as the main oscillator, it can launch oscillation of the mainoscillator. Later, the auxiliary oscillator is disconnected and thenturned off. In this manner, the power consumption overhead of theauxiliary oscillator is minimized. FIG. 18B shows the transientwaveforms V_(ctrl) 264, Aux Osc 266 and V₁ 268 of the startup circuit.

A circuit diagram illustrating a ninth embodiment of the ring oscillatorof the present invention incorporating a startup circuit that includesback to back inverter pairs is shown in FIG. 19. The circuit, generallyreferenced 270, comprises a two back to back inverter pairs 272. Eachpair of back-to-back inverters 272 forces a 180 degree phase shiftbetween V_(d1) and V_(d3) and between V_(d2) and V_(d4). When theseinverters are sized appropriately, the lock states are avoided andoscillation can be started easily. Note that these inverters having asmall size can be combined with other start up circuits of FIGS. 17A and18A as an additional aid to startup oscillation.

The terminology used herein is for the purpose of describing particularembodiments only and is not intended to be limiting of the invention. Asused herein, the singular forms “a”, “an” and “the” are intended toinclude the plural forms as well, unless the context clearly indicatesotherwise. It will be further understood that the terms “comprises”and/or “comprising,” when used in this specification, specify thepresence of stated features, integers, steps, operations, elements,and/or components, but do not preclude the presence or addition of oneor more other features, integers, steps, operations, elements,components, and/or groups thereof.

The corresponding structures, materials, acts, and equivalents of allmeans or step plus function elements in the claims below are intended toinclude any structure, material, or act for performing the function incombination with other claimed elements as specifically claimed. Thedescription of the present invention has been presented for purposes ofillustration and description, but is not intended to be exhaustive orlimited to the invention in the form disclosed. As numerousmodifications and changes will readily occur to those skilled in theart, it is intended that the invention not be limited to the limitednumber of embodiments described herein. Accordingly, it will beappreciated that all suitable variations, modifications and equivalentsmay be resorted to, falling within the spirit and scope of the presentinvention. The embodiments were chosen and described in order to bestexplain the principles of the invention and the practical application,and to enable others of ordinary skill in the art to understand theinvention for various embodiments with various modifications as aresuited to the particular use contemplated.

1-43. (canceled)
 44. A ring oscillator, comprising: a plurality of phaseshifters configured in a loop, each phase shifter operative to generatea substantially 90-degree phase shift and to provide voltageamplification of its respective input; a plurality of active circuits,each active circuit coupled to and associated with one of said phaseshifters; wherein said plurality of active circuits are dc-coupled totheir respective phase shifters; and wherein a gain of said plurality ofactive circuits combined with the voltage amplification of said phaseshifters causes said loop to oscillate.
 45. The ring oscillatoraccording to claim 44, wherein said phase shifters comprise one or morepassive components.
 46. The ring oscillator according to claim 45,wherein said passive components comprise a series inductor andcapacitor.
 47. The ring oscillator according to claim 45, wherein saidone or more passive components comprises at least one transformer. 48.The ring oscillator according to claim 44, wherein said active circuitcomprises an inverter.
 49. The ring oscillator according to claim 44,wherein said active circuit comprises a nonlinear amplifier.
 50. Thering oscillator according to claim 44, wherein said active circuitcomprises a voltage amplifier.
 51. The ring oscillator according toclaim 44, further comprising a startup circuit operative to inject oneor more pulses into said loop to launch said oscillation, said startupcircuit turned off and disconnected after oscillation in said loop isestablished.
 52. The ring oscillator according to claim 44, furthercomprising a plurality of first tuning capacitors, each first tuningcapacitor coupled to and associated with one of said active circuits andoperative to provide relatively coarse frequency tuning control of saidring oscillator.
 53. The ring oscillator according to claim 44, furthercomprising a plurality of second tuning capacitors, each second tuningcapacitor coupled to and associated with one of said active circuits andoperative to provide relatively fine frequency tuning control of saidring oscillator.
 54. The ring oscillator according to claim 44, furthercomprising a starter circuit incorporating an auxiliary oscillatorconnected to a node in said loop for a finite period of time andoperative to inject one or more pulses into said loop thereby generatingan initial oscillation therein.
 55. The ring oscillator according toclaim 54, wherein said startup circuit comprises back to back inverterpairs coupled to one or more nodes in said loop.
 56. A ring oscillator,comprising: a plurality of phase shifters configured in a loop, eachphase shifter operative to generate a substantially 90-degree phaseshift and to provide voltage amplification of its respective input; aplurality of active circuits, each active circuit coupled to andassociated with a respective one of said phase shifters; wherein atleast one of said plurality of phase shifters and said plurality ofactive circuits have single ended circuit structure; and wherein a gainof said plurality of active circuits combined with the voltageamplification of said phase shifters enables said loop to oscillate. 57.The ring oscillator according to claim 56, wherein said plurality ofphase shifters comprise at least one of a series inductor and capacitor,one or more passive components, and at least one transformer.
 58. Thering oscillator according to claim 56, wherein said active circuitscomprise at least one of an inverter, a nonlinear amplifier, and avoltage amplifier.
 59. The ring oscillator according to claim 56,further comprising a plurality of first tuning capacitors, each firsttuning capacitor coupled to and associated with one of said activecircuits and operative to provide relatively coarse frequency tuningcontrol of said ring oscillator.
 60. The ring oscillator according toclaim 56, further comprising a plurality of second tuning capacitors,each second tuning capacitor coupled to and associated with one of saidactive circuits and operative to provide relatively fine frequencytuning control of said ring oscillator.
 61. A ring oscillator,comprising: a plurality of phase shifters configured in a loop, eachphase shifter operative to generate a substantially 90-degree phaseshift and to provide voltage amplification of its respective input; aplurality of active circuits wherein each active circuit consists of aninverter, each inverter coupled to and associated with a respective oneof said phase shifters; wherein said plurality of inverters aredc-coupled to their respective phase shifters; and wherein a gain ofsaid plurality of inverters combined with the voltage amplification ofsaid phase shifters enables said loop to oscillate.
 62. The ringoscillator according to claim 61, wherein said plurality of phaseshifters comprise at least one of a series inductor and capacitor, oneor more passive components, and at least one transformer.
 63. The ringoscillator according to claim 61, further comprising a plurality offirst tuning capacitors, each first tuning capacitor coupled to andassociated with one of said active circuits and operative to providerelatively coarse frequency tuning control of said ring oscillator. 64.The ring oscillator according to claim 61, further comprising aplurality of second tuning capacitors, each second tuning capacitorcoupled to and associated with one of said active circuits and operativeto provide relatively fine frequency tuning control of said ringoscillator.